1/4 rev. e structure silicon monolit hic integrated circuit product series white led driver for tft back light type bdefv function ?integrated buck-boost current-mode dc/dc controller built-in osc (external r), external synchronous mode ?two integrated led current d river channel ?built-in under-vol tage lock out circuit (uvlo) set by a standard external r current. ?built-in over-voltage protection circuit (ovp) ?pwm light modulation ?built-in thermal shut down circuit (tsd ) ?fail outputself-diagnosis function ?built-in over-current protection circuit (ocp) ?built-in short detection cir cuit (scp) ?built-in led open s hort detection circuit ?oscillation frequency accuracy 5% absolute maximum ratings ta=25 parameter symbol limits unit power supply voltage v cc 3 6 v boot terminal voltage v boot 4 1 v sw,cs,outh terminal voltage v sw, v cs, v outh 3 6 v between boot-sw terminal voltage v boot-sw 7 v led12 output voltage v led12 3 6 v vreg,ovp,outl,fail1,fail2,leden, iset,vdac,pwm,ss,comp,rt,sync,en terminal voltage v vreg ,v ovp ,v outl ,v fail1 , v fail2, v leden , v iset ,v vdac ,v pwm ,v ss ,v comp ,v rt ,v sync ,v en -0.37 < v cc v power dissipation pd 1.10 1 w operating temperature range topr -40+105 storage temperature range tstg -55+150 led maximum output current i led 150 23 m a 1 ic mounted on glass epoxy board measuring 70mm70mm1.6mm, power dissipated at a rate of 8.8mw/ at temperatures above 25. 2 dispersion figures for led maximum output current and v f are correlated. please refer to data on separate sheet. 3 amount of current per channel. operating conditions (ta=25) parameter symbol target value unit power supply voltage v cc 5 . 0 3 0 v oscillation freq uency range osc 250600 khz external synchronization frequency range 4 sync fosc600 khz external synchronization pulse duty range sduty 4060 % 4 connect sync to gnd or open when not using external frequen cy synchronization. 5 do not switch between internal and external synchronization when an external synchronization signal is input to the device .
2/4 rev. e electrical characteristics unless otherwise noted vcc=12v,ta=25 this product is not designed for use in radioactive environment s. parameter symbol target value unit conditions min typ max circuit current i cc - 7 14 ma en=hi, sync=hi, rt=open pwm=low, iset=open, c in =10f standby current i st - 4 8 a en=low [vreg block] reference voltage v reg 4.5 5.0 5.5 v i reg =-5mac reg =2.2f [outh block] outh high-side on resistance r onhh 1.5 3.5 7 i on =-10ma outh low-side on resistance r onhl 1.0 2.5 5.0 i on =10ma over-current protection operating voltage v olimit vcc-0.66 vcc-0.6 vcc-0.54 v [outl block] outl high-side on resistance r onlh 2.0 4.0 8.0 i on =-10ma outl low-side on resistance r onll 1.0 2.5 5.0 i on =10ma [sw block] sw low-side on resistance ron_sw 2.0 4.5 9.0 i on_sw =10ma [error amplifier block] led voltage v led 0.9 1.0 1.1 v comp sink current i compsink 15 25 35 a v led =2v, vcomp=1v comp source current i compsource -35 -25 -15 a v led =0v, vcomp=1v [oscillating block] oscillating frequency f osc 285 300 315 khz r t =100k [ovp block] over-voltage detection reference voltage v ovp 1.9 2.0 2.1 v vovp=sweep up ovp hysteresis width v ohys 0.45 0.55 0.65 v vovp= sweep down scp latch off delay time t scp 70 100 130 ms rt=100k [uvlo block] uvlo voltage v uvlo 3.7 4.0 4.3 v vcc : sweep down uvlo hysteresis width v uhys 400 500 600 mv vcc : sweep up [led output block] led current relative dispersion width i led1 -3 - +3 % i led =50ma, i led1=( i led/ i led_avg -1)100 led current absolute dispersion width i led2 -5 - +5 % i led =50ma, i led2=( i led/ 50ma-1)100 iset voltage v iset 1.96 2.0 2.04 v r iset =120k pwm minimum pulse width tmin 25 - - us f pwm =150hzi led =50ma pwm maximum duty dmax - - 100 % f pwm =150hzi led =50ma pwm frequency f pwm - - 20 khz duty=50%i led =50ma vdac gain g vdac - 25 - ma/v v dac =02v i led =v dac r iset gain, r iset =120k led open detection voltage v open 0.2 0.3 0.4 v v led = sweep down led short detection voltage v short 4.2 4.5 4.8 v v led = sweep up led short latch off delay time t short 70 100 130 ms rt=100k pwm latch off delay time t pwm 70 100 130 ms rt=100k [logic inputsen,sync,pwm,leden] input high voltage v inh 2.1 - 5.5 v input low voltage v inl gnd - 0.8 v input current 1 i in 20 35 50 a v in =5v (sync,pwm,leden) input current 2 i en 15 25 35 a v en =5v (en) [fail outputopen drain] fail low voltage v ol - 0.1 0.2 v i ol =0.1ma
3/4 rev. e block diagram pin layout pin function table BD8113EFVhtssop-b24 pin symbol function 1 comp err amplifier output 2 ss soft start time-setting capacitance input 3 vcc input power supply 4 en enable input 5 rt oscillation frequency-setting resistance input 6 sync external synchronization signal input 7 gnd small-signal gnd 8 pwm pwm light modulation input 9 fail1 failure signal output 10 fail2 led open/short detection signal output 11 leden led output enable pin 12 led1 led output 1 13 led2 led output 2 14 ovp over-voltage detection input 15 vdac dc variable light modulation input 16 iset led output current-setting resistance input 17 pgnd led output gnd 18 outl low-side external mosfet gate drive 19 dgnd low-side internal mosfet driver source 20 sw high-side external mosfet source 21 outh high-side external mosfet gate drive 22 cs dc/dc current sense pin 23 boot high-side mosfet power supply pin 24 vreg internal reference voltage output package outlines dgnd rt comp err amp vin vreg + - vcc en rt ovp osc ss con trol logic uvlo tsd - + ss pwm led1 led2 current driver iset pgnd pwm c in r pc c pc c ss cs r iset fail1 - vreg vdac gnd iset boot outh sw + - fail2 leden c out sync vreg ovp timer latch pwm ocp drv ctl slope ocp ovp open short detect timer latch short det open det outl bd8113ef product number lot no. comp ss vcc en rt sync gnd pwm fail2 leden led1 vreg boot cs outh sw dgnd outl pgnd iset vdac ovp led2 fail1 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13
4/4 rev. e cautions on use 1absolute maximum ratings we are careful enough for quality control about this ic. so, there is no problem under normal operation, excluding that it exc eeds the absolute maximum ratings. however, this ic might be destroyed when the a bsolute maximum ratings, such as impressed voltages or the oper ating temperature range(topr), is exceeded, and whether the destructi on is short circuit mode or open circuit mode cannot be specifi ed. please take into consideration the physical countermeasures for safety, suc h as fusing, if a particular mode that exceeds the absolute max imum rating is assumed. 2reverse polarity connection connecting the power line to the ic in reverse polarity (from t hat recommended) will damage the part. please utilize the direc tion protection device as a diode in the supply line. 3power supply line due to return of regenerative current by reverse electromotive force, using electrolytic and ceramic suppress filter capacitor s (0.1f) close to the ic power input terminals (vcc and gnd) are recommended. ple ase note the electrolytic capacitor value decreases at lower te mperatures and examine to dispense physical measures for safety. and, for ics with more than one power supply, it is possible th at rush current may flow instantaneously due to the internal po wering sequence and delays. therefore, give special consideration to power coupling capacitance, width of power wiring, gnd wiring, and routing of wiring. please make the power supply lines (where large current flow) wide enough t o reduce the resistance of the power supply patterns, because t he resistance of power supply pattern might influence the usual operation. 4gnd line the ground line is where the lowest potential and transient voltages are connected to the ic. 5thermal design do not exceed the power dissipation (pd) of the package specification rating under actual operation, and please design enough temperature margins. 6short circuit mode between terminals and wrong mounting do not mount the ic in the wrong direction and be careful about the reverse-connection of the power connector. moreover, this ic might be destroyed when the dust short the terminals between them or pow er supply, gnd. 7radiation strong electromagnetic radiation can cause operation failures. 8aso(area of safety operation.) do not exceed the maximum aso and the absolute maximum ratings of the output driver 9tsd(thermal shut-down) the tsd is activated when the junction temperature (tj) reaches 175(with 25 hysteresis), and the output terminal is switched to hi-z. the tsd circuit aims to intercept ic from high temperature. the gua rantee and protection of ic are not purpose. therefore, please do not use this ic after tsd circuit operates, nor use it for assumption that oper ates the tsd circuit. 10inspection by the set circuit board the stress might hang to ic by connecting the capacitor to the terminal with low impedance. then, please discharge electricity in each and all process. moreover, in the inspection process, please turn off t he power before mounting the ic, and turn on after mounting the ic. in addition, please take into consideration the countermeasures for electros tatic damage, such as giving the earth in assembly process, tra nsportation or preservation. 11ic terminal input this ic is a monolithic ic, and has p + isolation and p substrate for the element separation. therefor e, a parasitic pn junction is firmed in this p-layer and n-layer of each element. for instance, the resistor or the transistor is connected to the terminal as shown in the figure below. when the gnd voltage potential is greater than the voltage potential at terminals a or b, the pn junction operates as a parasitic d iode. in addition, the parasitic npn transistor is formed in said parasitic diode and the n layer of surrounding elements close to said parasitic dio de. these parasitic elements are formed in the ic because of the voltage relation. the parasitic element operating causes the wrong operation and destruction. therefore, please be careful so as not to operate the parasitic elements by impressing to input terminals lower voltage than g nd(p substrate). please do not apply the voltage to the input terminal when the power-supply voltage is not impressed. moreover, please impress each input terminal lower than the power-supply voltage or equal to the sp ecified range in the guaranteed voltage when the power-supply v oltage is impressing. simplified structure of ic 12earth wiring pattern use separate ground lines for control signals and high current power driver outputs. because these high current outputs that f lows to the wire impedance changes the gnd voltage for control signal. therefore, each ground terminal of ic must be connected at the one point on the set circuit board. as for gnd of external parts, it is similar to t he above-mentioned.
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